High-throughput, low latency data movement between compute resources (memory included) has become a bottleneck in modern distributed computing workloads such as AI/ML, HPC, and databases. The interconnect fabrics for the two main types of data movement in compute - load store memory access and byte moving I/O - have historically been built and treated disparately. While this made sense when CPU I/O and network interfaces were far lower bandwidth than memory interfaces, their interconnect is now at an architectural merge point. In this keynote, Enfabrica will reveal its blueprint for any-scale, high-bandwidth, latency-tiered memory movement in the data center based on fabrics that blend load store and local DMA primitives (over CXL, PCIe, and similar) with RDMA over network technologies running at 800 Gbps and beyond. We will highlight the efficiencies of such a unified fabric architecture, its ability to render high-throughput memory movement as scalable and hierarchical from chipset to cluster, and its utility as an infrastructure building block that fits seamlessly within existing, robust system software frameworks.
Shrijeet Mukherjee
Shrijeet is a Co-Founder and the Chief Development Officer of Enfabrica. Prior to founding Enfabrica, he was an architect in Google’s infrastructure group. Previously, he was VP Engineering at Cumulus Networks where he built the industry’s first disaggregated Linux-native network operating system. He was the software engineering leader and architect of the industry’s first virtualization/storage offload “smart-NICs” for Cisco UCS. At SGI he was part of the Advanced Graphics team that pioneered floating point framebuffers and programmable shaders. Shrijeet is on the Linux NetDev Society Board of Directors and has over 20 patents. He holds an MS in Computer Science from the University of Oregon.