The AI ´memory wall´is well documented, where AIML applications are hitting bottlenecks in intra/inter-chip and communication across/to AIML accelerators. Memory requirements to train AIML models are typically several times larger than the number of parameters, while the speed of data transfer has consistently failed to keep up with advancements in compute capabilities.
In the innovative world of dedicated AIML processors and systems, there have been a variety of approaches, both at the chip and systems level, to engineering around these challenges. This panel will look at how leading engineering teams working in this space are tackling the AI memory wall and how they see requirements shifting as requirements for new types of models evolve.
![](https://kisacoresearch.com/sites/default/files/styles/panopoly_image_square/public/speakers/jean_bozman_headshot.jpeg?itok=cTrbQtu_&c=72390d288adc26455597e4ba3c9be775)
Jean Bozman
Jean S. Bozman is an IT industry analyst focusing on cloud infrastructure and the proud founder of a new company, Cloud Architects Advisors LLC.
She has had experience as an IDC Research VP for 10+ years and has covered the semiconductor industry as an analyst for over 20 years.
![](https://kisacoresearch.com/sites/default/files/styles/panopoly_image_square/public/speakers/sumti_jairath_headshot.jpeg?itok=Q1bsqe_D&c=fca690c28f3148226ba10bf3df52390c)
Sumti Jairath
Sumti Jairath is Chief Architect at SambaNova Systems, with expertise in hardware-software co-design. Sumti worked on PA-RISC-based Superdome servers back at HP, followed by several generations of SPARC CMT processors at Sun Microsystems and Oracle. At Oracle, Sumti worked on SQL, Data-analytics and Machine Learning acceleration in SPARC processors. Sumti holds 27 patents in computer architecture and hardware-software co-design.
![](https://kisacoresearch.com/sites/default/files/styles/panopoly_image_square/public/speakers/venkatramvishwanath_headshot.jpg?itok=TIKatYut&c=44d35ac767dc350698bea4a8ef5c1a3a)
Venkatram Vishwanath
Venkatram Vishwanath is a computer scientist at Argonne National Laboratory. He is the Data Science Team Lead at the Argonne leadership computing facility (ALCF). His current focus is on algorithms, system software, and workflows to facilitate data-centric applications on supercomputing systems. His interests include scientific applications, supercomputing architectures, parallel algorithms and runtimes, scalable analytics and collaborative workspaces. He has received best papers awards at venues including HPDC and LDAV, and a Gordon Bell finalist. Vishwanath received his Ph.D. in computer science from the University of Illinois at Chicago in 2009.
Research Interests
- Scientific data analysis and visualization
- Parallel I/O and I/O middleware
- Large-scale computing systems and other exotic architectures (Blue Gene, Cray, multi-core systems, GPUs and other accelerators)
- High-speed interconnects (InfiniBand, high-speed Ethernet, optical), data movement and transfer protocols, and (v) collaboration workspaces