Columbia
Corundum
Flare
Flagship
Price Transparency – “Disparity vs Discrepancy” hosted by Advanced Medical Strategies
Kisaco Research designed a comprehensive marketing strategy that included targeted email campaigns, social media promotion, and partnership outreach. The promotional assets featured engaging visuals and compelling content that highlighted the topic of the webinar which focused Price Transparency and the intricacies of data integrity and compliance and explore how these aspects impact usability, specifically:
Learning the key aspects of the CMS price transparency rule
Market Analysis
Hyperscaler
Emerging Memory Innovations
Hoshik Kim
VP & Fellow of Memory Systems Research
SK Hynix
Siamak Tavallaei
Senior Principal Engineer, System Architecture
Samsung
Siamak Tavallaei joined the CXL effort as a founding member of the CXL Consortium and co-chair of the Technical Task Force (TTF) in 2019 to develop the CXL 2.0 specification. He has served on the CXL Board of Directors and as the CXL President. In 2016, he joined Open Compute Project (OCP) as a co-lead of Server Project. He is currently the Incubation Committee Representative for the Server Project where he drives open-sourced modular design concepts for integrated hardware/software solutions. He has served as Chief Systems Architect at Google Cloud Platforms where he led the architecture and productization of CXL-enabled solutions. His recent focus has been the optimization of large-scale, mega-datacenters for general-purpose and tightly-connected accelerated machines built on co-designed hardware, software, security, and management. His experiences as Chief Systems Architect at Google Cloud, Senior Principal Architect at Microsoft Azure’s Hardware Architecture team, a Distinguished Technologist at HP, a Principal Member Technical Staff at Compaq, and his contributions to industry collaborations such as CXL, OCP, EISA, PCI, InfiniBand, and PCIe give Siamak a broad understanding of requirements for the Enterprise, Hyperscale, and Edge datacenters for industry-wide initiatives.
David Emberson
Senior Distinguished Technologist
HPE
David Emberson is Senior Distinguished Technologist for HPC System Architecture, where he is working on future memory system designs for HPE Cray systems. He began his career at MIT's Digital Systems Laboratory, where he built one of the first portable computers in 1975. He has held positions at Prime Computer, Megatest, Ametek Computer Research, and Sun Microsystems. At Sun, Mr. Emberson was a member of the SPARC architecture committee, managed the SparcStation 10 and SparcStation 20 programs, and was Senior Director at SunLabs. His consulting clients have included the Hypertransport Consortium, AMD, Intel, Atheros, PathScale, Qlogic and numerous startup companies.
At HPE he was Technical Director of HPE's PathForward program for the Department of Energy's Exascale Computing Program. His current research is in memory system design for HPC systems. He serves on the JEDEC J42.2 (HBM) committee and is a Senior Member of IEEE. Mr. Emberson has a B.S. in Electrical Engineering from MIT. He holds nineteen patents.
Hoshik Kim
VP & Fellow of Memory Systems Research
SK Hynix