| Page 219 | Kisaco Research
Software
Hardware
Infrastructure
Systems

Author:

Bing Yu

Senior Technical Director
Andes Technology

Bing Yu is a Sr. Technical Director at Andes Technology. He has over 30 years of experience in technical leadership and management, specializing in machine learning hardware, high performance CPUs and system architecture. In his current role, he is responsible for processor roadmap, architecture, and product design. Bing received his BS degree in Electrical Engineering from San Jose State University and completed the Stanford Executive Program (SEP) at the Stanford Graduate School of Business.

Bing Yu

Senior Technical Director
Andes Technology

Bing Yu is a Sr. Technical Director at Andes Technology. He has over 30 years of experience in technical leadership and management, specializing in machine learning hardware, high performance CPUs and system architecture. In his current role, he is responsible for processor roadmap, architecture, and product design. Bing received his BS degree in Electrical Engineering from San Jose State University and completed the Stanford Executive Program (SEP) at the Stanford Graduate School of Business.

Author:

John Fry

Chief of Staff
Positron AI

John has worked in the hardware industry for 30 years developing and bringing to market custom linear algebra-based computing solutions for the rollout of digital TV, the build-out of cellular and networked communication systems for the internet, and more recently big data and AI. John has worked for Altera, Arm, Groq and a few startups in a variety of leadership roles prior to joining Positron where he is Chief of Staff.

John Fry

Chief of Staff
Positron AI

John has worked in the hardware industry for 30 years developing and bringing to market custom linear algebra-based computing solutions for the rollout of digital TV, the build-out of cellular and networked communication systems for the internet, and more recently big data and AI. John has worked for Altera, Arm, Groq and a few startups in a variety of leadership roles prior to joining Positron where he is Chief of Staff.

Author:

Mitchelle Rasquinha

Software Engineer
MLCommons

Mitchelle Rasquinha

Software Engineer
MLCommons
Moderator

Author:

Sree Ganesan

VP of Product
d-Matrix

Sree Ganesan, VP of Product, d-Matrix: Sree is responsible for product management functions and business development efforts across the company. She manages the product lifecycle, definition and translation of customer needs to the product development function, acting as the voice of the customer. Prior, Sree led the Software Product Management effort at Habana Labs/Intel, delivering state-of-the-art deep learning capabilities of the Habana SynapseAI® software suite to the market. Previously, she was Engineering Director in Intel’s AI Products Group, where she was responsible for AI software strategy and deep learning framework integration for Nervana NNP AI accelerators. Sree earned a bachelor’s degree in electrical engineering from the Indian Institute of Technology Madras and a PhD in computer engineering from the University of Cincinnati, Ohio.

Sree Ganesan

VP of Product
d-Matrix

Sree Ganesan, VP of Product, d-Matrix: Sree is responsible for product management functions and business development efforts across the company. She manages the product lifecycle, definition and translation of customer needs to the product development function, acting as the voice of the customer. Prior, Sree led the Software Product Management effort at Habana Labs/Intel, delivering state-of-the-art deep learning capabilities of the Habana SynapseAI® software suite to the market. Previously, she was Engineering Director in Intel’s AI Products Group, where she was responsible for AI software strategy and deep learning framework integration for Nervana NNP AI accelerators. Sree earned a bachelor’s degree in electrical engineering from the Indian Institute of Technology Madras and a PhD in computer engineering from the University of Cincinnati, Ohio.

Edge
Generative AI
Infrastructure
Moderator

Author:

Jeff White

CTO, Edge
Dell Technologies

Jeff is the Industry CTO of Dell Technologies of the Automotive sector, specifically in the area of Connected and Autonomous Vehicles and overall Edge Technology strategy lead. Jeff is responsible for leading the team that is developing the overall Dell Technologies technology strategy development, architectural direction and product requirements for the Intelligent Connected Vehicle platform.

He also is the Chairman of the Dell Automotive Design Authority Council responsible for the technical solution design. In his role as Edge Technology Lead he is driving the development of a Dell Technology wide Edge platform including the physical edge systems, heterogenous compute, memory/storage, environment, security, data management, control plane stack and automation/orchestration.

Previously, Jeff has held senior roles at an early stage artificial intelligence/machine reasoning based process automation technology provider and Elefante Group a stratospheric wireless communications platform as CTO. He also held senior positions at Hewlett Packard Enterprise, Ericsson and Alcatel-Lucent where he led technology initiatives, solutions development, business development and services delivery.
Earlier in his career White served in leadership roles at BellSouth and Cingular Wireless (now AT&T). At Cingular, he led the National Transport Infrastructure Engineering with responsibility for national transport, VoIP & IMS engineering. At BellSouth (now AT&T) he led the Broadband Internet Operations & Support organization which included broadband access tier two technical support, customer networking equipment business, broadband OSS & end-to-end process.

White holds a Bachelor of Science degree in Electrical Engineering from Southern Polytechnic University. He also served as Chairman of the Tech Titans Technology Association of North Texas representing over 300 Technology companies in the greater North Texas community. He also served on the North Texas Regional committee of the Texas Emerging Technology fund under Governor Rick Perry.

Jeff White

CTO, Edge
Dell Technologies

Jeff is the Industry CTO of Dell Technologies of the Automotive sector, specifically in the area of Connected and Autonomous Vehicles and overall Edge Technology strategy lead. Jeff is responsible for leading the team that is developing the overall Dell Technologies technology strategy development, architectural direction and product requirements for the Intelligent Connected Vehicle platform.

He also is the Chairman of the Dell Automotive Design Authority Council responsible for the technical solution design. In his role as Edge Technology Lead he is driving the development of a Dell Technology wide Edge platform including the physical edge systems, heterogenous compute, memory/storage, environment, security, data management, control plane stack and automation/orchestration.

Previously, Jeff has held senior roles at an early stage artificial intelligence/machine reasoning based process automation technology provider and Elefante Group a stratospheric wireless communications platform as CTO. He also held senior positions at Hewlett Packard Enterprise, Ericsson and Alcatel-Lucent where he led technology initiatives, solutions development, business development and services delivery.
Earlier in his career White served in leadership roles at BellSouth and Cingular Wireless (now AT&T). At Cingular, he led the National Transport Infrastructure Engineering with responsibility for national transport, VoIP & IMS engineering. At BellSouth (now AT&T) he led the Broadband Internet Operations & Support organization which included broadband access tier two technical support, customer networking equipment business, broadband OSS & end-to-end process.

White holds a Bachelor of Science degree in Electrical Engineering from Southern Polytechnic University. He also served as Chairman of the Tech Titans Technology Association of North Texas representing over 300 Technology companies in the greater North Texas community. He also served on the North Texas Regional committee of the Texas Emerging Technology fund under Governor Rick Perry.

Author:

Gayathri Radhakrishnan

Partner
Hitachi Ventures

Gayathri is currently Partner at Hitachi Ventures. Prior to that, she was with Micron Ventures, actively investing in startups that apply AI to solve critical problems in the areas of Manufacturing, Healthcare and Automotive. She brings over 20 years of multi-disciplinary experience across product management, product marketing, corporate strategy, M&A and venture investments in large Fortune 500 companies such as Dell and Corning and in startups. She has also worked as an early stage investor at Earlybird Venture Capital, a premier European venture capital fund based in Germany. She has a Masters in EE from The Ohio State University and MBA from INSEAD in France. She is also a Kauffman Fellow - Class 16.

Gayathri Radhakrishnan

Partner
Hitachi Ventures

Gayathri is currently Partner at Hitachi Ventures. Prior to that, she was with Micron Ventures, actively investing in startups that apply AI to solve critical problems in the areas of Manufacturing, Healthcare and Automotive. She brings over 20 years of multi-disciplinary experience across product management, product marketing, corporate strategy, M&A and venture investments in large Fortune 500 companies such as Dell and Corning and in startups. She has also worked as an early stage investor at Earlybird Venture Capital, a premier European venture capital fund based in Germany. She has a Masters in EE from The Ohio State University and MBA from INSEAD in France. She is also a Kauffman Fellow - Class 16.

Author:

Roberto Mijat

Senior Director
Blaize

Roberto leads product marketing and strategy at Blaize. He is an AI technology and product leader with an engineering background and over 20 years of experience in developing and taking to market advanced semiconductor hardware and software solutions.

Roberto spent over 15 years at Arm, holding several senior product and business leadership positions and leading multiple global product teams. He was a member of the company’s Product Line Board and Steering board for AI on CPU. He created and architected the Compute Libraries framework, a key component of Arm’s AI software stack, deployed in billions of devices today. Roberto established the Arm GPU Compute ecosystem from scratch and led collaborations with dozens of industry leaders, including Facebook, Google, Huawei, MediaTek, and Samsung.

At Graphcore, Roberto led the launch of the Bow IPU AI accelerator, promoted the standardization of FP8, and led collaborations with storage partners.

Roberto is an advisor at Silicon Catalyst and a Mentor at London Business School.  He holds a first degree in Artificial Intelligence and Quantum Computing and an Executive MBA from London Business School.

 

Roberto Mijat

Senior Director
Blaize

Roberto leads product marketing and strategy at Blaize. He is an AI technology and product leader with an engineering background and over 20 years of experience in developing and taking to market advanced semiconductor hardware and software solutions.

Roberto spent over 15 years at Arm, holding several senior product and business leadership positions and leading multiple global product teams. He was a member of the company’s Product Line Board and Steering board for AI on CPU. He created and architected the Compute Libraries framework, a key component of Arm’s AI software stack, deployed in billions of devices today. Roberto established the Arm GPU Compute ecosystem from scratch and led collaborations with dozens of industry leaders, including Facebook, Google, Huawei, MediaTek, and Samsung.

At Graphcore, Roberto led the launch of the Bow IPU AI accelerator, promoted the standardization of FP8, and led collaborations with storage partners.

Roberto is an advisor at Silicon Catalyst and a Mentor at London Business School.  He holds a first degree in Artificial Intelligence and Quantum Computing and an Executive MBA from London Business School.

 

Author:

Adam Benzion

Chief Experience Officer
Edge Impulse

Adam Benzion

Chief Experience Officer
Edge Impulse
Infrastructure
Data Centres

Author:

Gerald Friedland

Principal Scientist Auto ML
AWS

Dr. Gerald Friedland is a Principal Scientist at AWS working on Low-Code, No-Code Machine Learning. Before that he was CTO and founder of Brainome, a no-code machine learning service for miniature models. Other posts include UC Berkeley, Lawrence Livermore National Lab, and the International Computer Science Institute. He was the lead figure behind the Multimedia Commons initiative, a collection of 100M images and 1M videos for research and has published more than 200 peer-reviewed articles in conferences, journals, and books. His latest book "Information-Driven Machine Learning" was released by Springer-Nature in Dec. 2023. He also co-authored a textbook on Multimedia Computing with Cambridge University Press. Dr. Friedland received his doctorate (summa cum laude) and master's degree in computer science from Freie Universitaet Berlin, Germany, in 2002 and 2006, respectively.

Gerald Friedland

Principal Scientist Auto ML
AWS

Dr. Gerald Friedland is a Principal Scientist at AWS working on Low-Code, No-Code Machine Learning. Before that he was CTO and founder of Brainome, a no-code machine learning service for miniature models. Other posts include UC Berkeley, Lawrence Livermore National Lab, and the International Computer Science Institute. He was the lead figure behind the Multimedia Commons initiative, a collection of 100M images and 1M videos for research and has published more than 200 peer-reviewed articles in conferences, journals, and books. His latest book "Information-Driven Machine Learning" was released by Springer-Nature in Dec. 2023. He also co-authored a textbook on Multimedia Computing with Cambridge University Press. Dr. Friedland received his doctorate (summa cum laude) and master's degree in computer science from Freie Universitaet Berlin, Germany, in 2002 and 2006, respectively.

With the ubiquitous and increasing use of computing, the talk will quantitatively demonstrate unsustainable energy and complexity trends in computing and AI, from hardware, algorithms, and software. Our discussion of the unsustainability of these trends will motivate a few exciting directions for computing, especially for applications to AI/ML. Specifically, we will touch upon the evolution of hardware in terms of energy used following Dennard scaling and the challenges posed by continuing these current trends.  We will illustrate opportunities suggested by a few of these unsustainable trends of computing, specifically on applications to Machine Learning and Artificial Intelligence including at the edge. Given the goals of achieving AGI promised by current technologies, we will propose a modified form of Turing’s test that points to a new conceptualization of computing for application beyond the current paradigms.

Inferencing
Systems
Infrastructure

Author:

Sadasivan Shankar

Research Technology Manager
SLAC National Laboratory and Stanford University

Sadasivan (Sadas) Shankar is Research Technology Manager at SLAC National Laboratory, adjunct Professor in Stanford Materials Science and Engineering, and Lecturer in the Stanford Graduate School of Business. He was an Associate in the Department of Physics at Harvard University, and was the first Margaret and Will Hearst Visiting Lecturer in Harvard and the first Distinguished Scientist in Residence at the Harvard Institute of Applied Computational Sciences. He has co-instructed classes related to design of materials, computing, sustainability in materials, and has received Excellence in Teaching award from Harvard University. He is co-instructing a class at Stanford University on Translation for
Innovations. He is a co-founder of and the Chief Scientist at Material Alchemy, a “last mile” translational and independent venture that has been recently founded to accelerate the path from materials discovery to adoption, with environmental sustainability as a key goal. In addition to research on fundamentals of Materials Design, his current research is on new architectures for specialized AI methods is exploring ways of bringing machine intelligence to system-level challenges in inorganic/biochemistry, materials, and physics and new frameworks for computing as information processing inspired by lessons from 

nature.
Dr. Shankar’s current research and analysis on Sustainable Computing is helping provide directions for the US Department of Energy’s EES2 scaling initiatives (energy reduction in computing every generation for 1000X reduction in 2 decades) as part of the White House Plan to Revitalize American Manufacturing and Secure Critical Supply Chains in 2022 for investment in research, development, demonstration, and commercial application (RDD&CA) in conventional semiconductors.

In addition, his analysis is helping identify pathways for energy efficient computing. While in the industry, Dr. Shankar and his team have enabled several critical technology decisions in the semiconductor industrial applications of chemistry, materials, processing, packaging, manufacturing, and design rules for over nine generations of Moore’s law including first advanced
process control application in 300 mm wafer technology; introduction of flip chip packaging using electrodeposition, 100% Pb-elimination in microprocessors, design of new materials, devices including nano warp-around devices for the advanced semiconductor technology manufacturing, processing
methods, reactors, etc. Dr. Shankar managed his team members distributed across multiple sites in the US, with collaborations in Europe. The teams won several awards from the Executive Management and technology organizations.

He is a co-inventor in over twenty patent filings covering areas in new
chemical reactor designs, semiconductor processes, bulk and nano materials for the sub 10 nanometer generation of transistors, device structures, and algorithms. He is also a co-author in over hundred publications and presentations in measurements, multi-scale and multi-physics methods spanning from quantum scale to macroscopic scales, in the areas of chemical synthesis, plasma chemistry and processing, non-equilibrium electronic, ionic, and atomic transport, energy efficiency of information processing, and machine learning methods for bridging across scales, and estimating complex materials
properties and in advanced process control.

Dr. Shankar was an invited speaker at the Clean-IT Conference in Germany on Revolutionize Digital Systems and AI (2023), Telluride Quantum Inspired Neuromorphic Computing Workshop (2023) on Limiting Energy Estimates for Classical and Quantum Information Processing, Argonne National
Laboratory Director’s Special Colloquium on the Future of Computing (2022), panelist on Carnegie Science series on Brain and Computing (2020), lecturer in the Winter Course on Computational Brain Research in IIT-M-India (2020), invited participant in the Kavli Institute of Theoretical Physics program
on Cellular Energetics in UCSB (2019), invited speaker to the Camille and Henry Dreyfus Foundation meeting on Machine Learning for problems in Chemistry and Materials Science (2019), a Senior Fellow in UCLA Institute of Pure and Applied Mathematics during the program on Machine Learning and Manybody
Physics (2016), invited to the White House event for starting of the Materials Genome Initiative (2012), Invited speaker in Erwin Schrödinger International Institute for Mathematical Physics-Vienna (2007), Intel’s first Distinguished Lecturer in Caltech (1998) and MIT (1999). He has also given several
colloquia and lectures in universities all over the world and his research was also featured in the publications Science (2012), TED (2013), Nature Machine Intelligence (2022), Nature Physics (2022).

Sadasivan Shankar

Research Technology Manager
SLAC National Laboratory and Stanford University

Sadasivan (Sadas) Shankar is Research Technology Manager at SLAC National Laboratory, adjunct Professor in Stanford Materials Science and Engineering, and Lecturer in the Stanford Graduate School of Business. He was an Associate in the Department of Physics at Harvard University, and was the first Margaret and Will Hearst Visiting Lecturer in Harvard and the first Distinguished Scientist in Residence at the Harvard Institute of Applied Computational Sciences. He has co-instructed classes related to design of materials, computing, sustainability in materials, and has received Excellence in Teaching award from Harvard University. He is co-instructing a class at Stanford University on Translation for
Innovations. He is a co-founder of and the Chief Scientist at Material Alchemy, a “last mile” translational and independent venture that has been recently founded to accelerate the path from materials discovery to adoption, with environmental sustainability as a key goal. In addition to research on fundamentals of Materials Design, his current research is on new architectures for specialized AI methods is exploring ways of bringing machine intelligence to system-level challenges in inorganic/biochemistry, materials, and physics and new frameworks for computing as information processing inspired by lessons from 

nature.
Dr. Shankar’s current research and analysis on Sustainable Computing is helping provide directions for the US Department of Energy’s EES2 scaling initiatives (energy reduction in computing every generation for 1000X reduction in 2 decades) as part of the White House Plan to Revitalize American Manufacturing and Secure Critical Supply Chains in 2022 for investment in research, development, demonstration, and commercial application (RDD&CA) in conventional semiconductors.

In addition, his analysis is helping identify pathways for energy efficient computing. While in the industry, Dr. Shankar and his team have enabled several critical technology decisions in the semiconductor industrial applications of chemistry, materials, processing, packaging, manufacturing, and design rules for over nine generations of Moore’s law including first advanced
process control application in 300 mm wafer technology; introduction of flip chip packaging using electrodeposition, 100% Pb-elimination in microprocessors, design of new materials, devices including nano warp-around devices for the advanced semiconductor technology manufacturing, processing
methods, reactors, etc. Dr. Shankar managed his team members distributed across multiple sites in the US, with collaborations in Europe. The teams won several awards from the Executive Management and technology organizations.

He is a co-inventor in over twenty patent filings covering areas in new
chemical reactor designs, semiconductor processes, bulk and nano materials for the sub 10 nanometer generation of transistors, device structures, and algorithms. He is also a co-author in over hundred publications and presentations in measurements, multi-scale and multi-physics methods spanning from quantum scale to macroscopic scales, in the areas of chemical synthesis, plasma chemistry and processing, non-equilibrium electronic, ionic, and atomic transport, energy efficiency of information processing, and machine learning methods for bridging across scales, and estimating complex materials
properties and in advanced process control.

Dr. Shankar was an invited speaker at the Clean-IT Conference in Germany on Revolutionize Digital Systems and AI (2023), Telluride Quantum Inspired Neuromorphic Computing Workshop (2023) on Limiting Energy Estimates for Classical and Quantum Information Processing, Argonne National
Laboratory Director’s Special Colloquium on the Future of Computing (2022), panelist on Carnegie Science series on Brain and Computing (2020), lecturer in the Winter Course on Computational Brain Research in IIT-M-India (2020), invited participant in the Kavli Institute of Theoretical Physics program
on Cellular Energetics in UCSB (2019), invited speaker to the Camille and Henry Dreyfus Foundation meeting on Machine Learning for problems in Chemistry and Materials Science (2019), a Senior Fellow in UCLA Institute of Pure and Applied Mathematics during the program on Machine Learning and Manybody
Physics (2016), invited to the White House event for starting of the Materials Genome Initiative (2012), Invited speaker in Erwin Schrödinger International Institute for Mathematical Physics-Vienna (2007), Intel’s first Distinguished Lecturer in Caltech (1998) and MIT (1999). He has also given several
colloquia and lectures in universities all over the world and his research was also featured in the publications Science (2012), TED (2013), Nature Machine Intelligence (2022), Nature Physics (2022).

Edge
Hardware
Systems

Author:

Jinwook Oh

Co Founder and CTO
Rebellions

Jinwook Oh is the Co-Founder and Chief Technology Officer of Rebellions, an AI chip company based in South Korea. After earning his Ph.D. from KAIST (Korea Advanced Institute of Science and Technology), he joined the IBM TJ Watson Research Center, where he contributed to several AI chip R&D projects as a Chip Architect, Logic Designer, and Logic Power Lead. At Rebellions, he has overseen the development and launch of two AI chips, with a third, REBEL, in progress. Jinwook's technical leadership has been crucial in establishing Rebellions as a notable player in AI technology within just three and a half years.

Jinwook Oh

Co Founder and CTO
Rebellions

Jinwook Oh is the Co-Founder and Chief Technology Officer of Rebellions, an AI chip company based in South Korea. After earning his Ph.D. from KAIST (Korea Advanced Institute of Science and Technology), he joined the IBM TJ Watson Research Center, where he contributed to several AI chip R&D projects as a Chip Architect, Logic Designer, and Logic Power Lead. At Rebellions, he has overseen the development and launch of two AI chips, with a third, REBEL, in progress. Jinwook's technical leadership has been crucial in establishing Rebellions as a notable player in AI technology within just three and a half years.

In this presentation, we will explore the advanced integration of Digital In-Memory Computing (D-IMC) and RISC-V technology by Axelera AI to accelerate AI inference workloads. Our approach uniquely combines the high energy efficiency and throughput of D-IMC with the versatility of RISC-V technology, creating a powerful and scalable platform. This platform is designed to handle a wide range of AI tasks, from advanced computer vision at the edge to emerging AI challenges.

We will demonstrate how our scalable architecture not only meets but exceeds the demands of modern AI applications. Our platform enhances performance while significantly reducing energy use and operational costs. By pushing the boundaries of Edge AI and venturing into new AI domains, Axelera AI is setting new benchmarks in AI processing efficiency and deployment capabilities.

Edge
Infrastructure
MLOps

Author:

Evangelos Eleftheriou

Co-Founder and CTO
Axelera AI

Evangelos Eleftheriou, an IEEE and IBM Fellow, is the Chief Technology Officer and co-founder of Axelera AI, a best-in-class performance company that develops a game-changing hardware and software platform for AI.

As a CTO, Evangelos oversees the development and dissemination of technology for external customers, vendors, and other clients to help improve and increase Axelera AI’s business.

Before his current role, Evangelos worked for IBM Research – Zurich, where he held various management positions for over 35 years. His outstanding achievements led him to become an IBM Fellow, which is IBM’s highest technical honour.

In 2002, Evangelos became a Fellow of the IEEE, and later in 2003, he was co-recipient of the IEEE ComS Leonard G. Abraham Prize Paper Award. He was also co-recipient of the 2005 Technology Award of the Eduard Rhein Foundation. In 2005, he was appointed an IBM Fellow and inducted into the IBM Academy of Technology. In 2009, he was co-recipient of the IEEE Control Systems Technology Award and the IEEE Transactions on Control Systems Technology Outstanding Paper Award. In 2016, Evangelos received an honoris causa professorship from the University of Patras, Greece. In 2018, he was inducted into the US National Academy of Engineering as Foreign Member. Evangelos has authored or coauthored over 250 publications and holds over 160 patents (granted and pending applications).

His primary interests lie in AI and machine learning, including emerging computing paradigms such as neuromorphic and in-memory computing.

Evangelos holds a PhD and a Master of Eng. degrees in Electrical Engineering from Carleton University, Canada, and a BSc in Electrical & Computer Engineering from the University of Patras, Greece.

Evangelos Eleftheriou

Co-Founder and CTO
Axelera AI

Evangelos Eleftheriou, an IEEE and IBM Fellow, is the Chief Technology Officer and co-founder of Axelera AI, a best-in-class performance company that develops a game-changing hardware and software platform for AI.

As a CTO, Evangelos oversees the development and dissemination of technology for external customers, vendors, and other clients to help improve and increase Axelera AI’s business.

Before his current role, Evangelos worked for IBM Research – Zurich, where he held various management positions for over 35 years. His outstanding achievements led him to become an IBM Fellow, which is IBM’s highest technical honour.

In 2002, Evangelos became a Fellow of the IEEE, and later in 2003, he was co-recipient of the IEEE ComS Leonard G. Abraham Prize Paper Award. He was also co-recipient of the 2005 Technology Award of the Eduard Rhein Foundation. In 2005, he was appointed an IBM Fellow and inducted into the IBM Academy of Technology. In 2009, he was co-recipient of the IEEE Control Systems Technology Award and the IEEE Transactions on Control Systems Technology Outstanding Paper Award. In 2016, Evangelos received an honoris causa professorship from the University of Patras, Greece. In 2018, he was inducted into the US National Academy of Engineering as Foreign Member. Evangelos has authored or coauthored over 250 publications and holds over 160 patents (granted and pending applications).

His primary interests lie in AI and machine learning, including emerging computing paradigms such as neuromorphic and in-memory computing.

Evangelos holds a PhD and a Master of Eng. degrees in Electrical Engineering from Carleton University, Canada, and a BSc in Electrical & Computer Engineering from the University of Patras, Greece.

Data Center
Infrastructure
Inferencing
Moderator

Author:

Bijan Nowroozi

Chief Technical Officer
The Open Compute Project Foundation

Bijan Nowroozi is Chief Technical Officer of The Open Compute Project Foundation and has more than 30 years of experience with hardware and software development, signal processing, networking, and research with technology companies. Prior to The OCP Bijan developed mission critical infrastructure and was on the leading-edge standards and technology development in multiple technology waves including edge computing, AI/ML, optical/photonics, quantum, RF, wireless, small cells, UAV’s, GIS, HPC, network security, energy and more. 

Bijan Nowroozi

Chief Technical Officer
The Open Compute Project Foundation

Bijan Nowroozi is Chief Technical Officer of The Open Compute Project Foundation and has more than 30 years of experience with hardware and software development, signal processing, networking, and research with technology companies. Prior to The OCP Bijan developed mission critical infrastructure and was on the leading-edge standards and technology development in multiple technology waves including edge computing, AI/ML, optical/photonics, quantum, RF, wireless, small cells, UAV’s, GIS, HPC, network security, energy and more. 

Author:

Sadasivan Shankar

Research Technology Manager
SLAC National Laboratory and Stanford University

Sadasivan (Sadas) Shankar is Research Technology Manager at SLAC National Laboratory, adjunct Professor in Stanford Materials Science and Engineering, and Lecturer in the Stanford Graduate School of Business. He was an Associate in the Department of Physics at Harvard University, and was the first Margaret and Will Hearst Visiting Lecturer in Harvard and the first Distinguished Scientist in Residence at the Harvard Institute of Applied Computational Sciences. He has co-instructed classes related to design of materials, computing, sustainability in materials, and has received Excellence in Teaching award from Harvard University. He is co-instructing a class at Stanford University on Translation for
Innovations. He is a co-founder of and the Chief Scientist at Material Alchemy, a “last mile” translational and independent venture that has been recently founded to accelerate the path from materials discovery to adoption, with environmental sustainability as a key goal. In addition to research on fundamentals of Materials Design, his current research is on new architectures for specialized AI methods is exploring ways of bringing machine intelligence to system-level challenges in inorganic/biochemistry, materials, and physics and new frameworks for computing as information processing inspired by lessons from 

nature.
Dr. Shankar’s current research and analysis on Sustainable Computing is helping provide directions for the US Department of Energy’s EES2 scaling initiatives (energy reduction in computing every generation for 1000X reduction in 2 decades) as part of the White House Plan to Revitalize American Manufacturing and Secure Critical Supply Chains in 2022 for investment in research, development, demonstration, and commercial application (RDD&CA) in conventional semiconductors.

In addition, his analysis is helping identify pathways for energy efficient computing. While in the industry, Dr. Shankar and his team have enabled several critical technology decisions in the semiconductor industrial applications of chemistry, materials, processing, packaging, manufacturing, and design rules for over nine generations of Moore’s law including first advanced
process control application in 300 mm wafer technology; introduction of flip chip packaging using electrodeposition, 100% Pb-elimination in microprocessors, design of new materials, devices including nano warp-around devices for the advanced semiconductor technology manufacturing, processing
methods, reactors, etc. Dr. Shankar managed his team members distributed across multiple sites in the US, with collaborations in Europe. The teams won several awards from the Executive Management and technology organizations.

He is a co-inventor in over twenty patent filings covering areas in new
chemical reactor designs, semiconductor processes, bulk and nano materials for the sub 10 nanometer generation of transistors, device structures, and algorithms. He is also a co-author in over hundred publications and presentations in measurements, multi-scale and multi-physics methods spanning from quantum scale to macroscopic scales, in the areas of chemical synthesis, plasma chemistry and processing, non-equilibrium electronic, ionic, and atomic transport, energy efficiency of information processing, and machine learning methods for bridging across scales, and estimating complex materials
properties and in advanced process control.

Dr. Shankar was an invited speaker at the Clean-IT Conference in Germany on Revolutionize Digital Systems and AI (2023), Telluride Quantum Inspired Neuromorphic Computing Workshop (2023) on Limiting Energy Estimates for Classical and Quantum Information Processing, Argonne National
Laboratory Director’s Special Colloquium on the Future of Computing (2022), panelist on Carnegie Science series on Brain and Computing (2020), lecturer in the Winter Course on Computational Brain Research in IIT-M-India (2020), invited participant in the Kavli Institute of Theoretical Physics program
on Cellular Energetics in UCSB (2019), invited speaker to the Camille and Henry Dreyfus Foundation meeting on Machine Learning for problems in Chemistry and Materials Science (2019), a Senior Fellow in UCLA Institute of Pure and Applied Mathematics during the program on Machine Learning and Manybody
Physics (2016), invited to the White House event for starting of the Materials Genome Initiative (2012), Invited speaker in Erwin Schrödinger International Institute for Mathematical Physics-Vienna (2007), Intel’s first Distinguished Lecturer in Caltech (1998) and MIT (1999). He has also given several
colloquia and lectures in universities all over the world and his research was also featured in the publications Science (2012), TED (2013), Nature Machine Intelligence (2022), Nature Physics (2022).

Sadasivan Shankar

Research Technology Manager
SLAC National Laboratory and Stanford University

Sadasivan (Sadas) Shankar is Research Technology Manager at SLAC National Laboratory, adjunct Professor in Stanford Materials Science and Engineering, and Lecturer in the Stanford Graduate School of Business. He was an Associate in the Department of Physics at Harvard University, and was the first Margaret and Will Hearst Visiting Lecturer in Harvard and the first Distinguished Scientist in Residence at the Harvard Institute of Applied Computational Sciences. He has co-instructed classes related to design of materials, computing, sustainability in materials, and has received Excellence in Teaching award from Harvard University. He is co-instructing a class at Stanford University on Translation for
Innovations. He is a co-founder of and the Chief Scientist at Material Alchemy, a “last mile” translational and independent venture that has been recently founded to accelerate the path from materials discovery to adoption, with environmental sustainability as a key goal. In addition to research on fundamentals of Materials Design, his current research is on new architectures for specialized AI methods is exploring ways of bringing machine intelligence to system-level challenges in inorganic/biochemistry, materials, and physics and new frameworks for computing as information processing inspired by lessons from 

nature.
Dr. Shankar’s current research and analysis on Sustainable Computing is helping provide directions for the US Department of Energy’s EES2 scaling initiatives (energy reduction in computing every generation for 1000X reduction in 2 decades) as part of the White House Plan to Revitalize American Manufacturing and Secure Critical Supply Chains in 2022 for investment in research, development, demonstration, and commercial application (RDD&CA) in conventional semiconductors.

In addition, his analysis is helping identify pathways for energy efficient computing. While in the industry, Dr. Shankar and his team have enabled several critical technology decisions in the semiconductor industrial applications of chemistry, materials, processing, packaging, manufacturing, and design rules for over nine generations of Moore’s law including first advanced
process control application in 300 mm wafer technology; introduction of flip chip packaging using electrodeposition, 100% Pb-elimination in microprocessors, design of new materials, devices including nano warp-around devices for the advanced semiconductor technology manufacturing, processing
methods, reactors, etc. Dr. Shankar managed his team members distributed across multiple sites in the US, with collaborations in Europe. The teams won several awards from the Executive Management and technology organizations.

He is a co-inventor in over twenty patent filings covering areas in new
chemical reactor designs, semiconductor processes, bulk and nano materials for the sub 10 nanometer generation of transistors, device structures, and algorithms. He is also a co-author in over hundred publications and presentations in measurements, multi-scale and multi-physics methods spanning from quantum scale to macroscopic scales, in the areas of chemical synthesis, plasma chemistry and processing, non-equilibrium electronic, ionic, and atomic transport, energy efficiency of information processing, and machine learning methods for bridging across scales, and estimating complex materials
properties and in advanced process control.

Dr. Shankar was an invited speaker at the Clean-IT Conference in Germany on Revolutionize Digital Systems and AI (2023), Telluride Quantum Inspired Neuromorphic Computing Workshop (2023) on Limiting Energy Estimates for Classical and Quantum Information Processing, Argonne National
Laboratory Director’s Special Colloquium on the Future of Computing (2022), panelist on Carnegie Science series on Brain and Computing (2020), lecturer in the Winter Course on Computational Brain Research in IIT-M-India (2020), invited participant in the Kavli Institute of Theoretical Physics program
on Cellular Energetics in UCSB (2019), invited speaker to the Camille and Henry Dreyfus Foundation meeting on Machine Learning for problems in Chemistry and Materials Science (2019), a Senior Fellow in UCLA Institute of Pure and Applied Mathematics during the program on Machine Learning and Manybody
Physics (2016), invited to the White House event for starting of the Materials Genome Initiative (2012), Invited speaker in Erwin Schrödinger International Institute for Mathematical Physics-Vienna (2007), Intel’s first Distinguished Lecturer in Caltech (1998) and MIT (1999). He has also given several
colloquia and lectures in universities all over the world and his research was also featured in the publications Science (2012), TED (2013), Nature Machine Intelligence (2022), Nature Physics (2022).

Author:

Ankita Singh

Investment Director
Bosch Ventures

Ankita Singh

Investment Director
Bosch Ventures

Author:

Dil Radhakrishnan

Engineer
Minlo

Dileeshvar Radhakrishnan is an engineer at MinIO where he focuses on AI/ML and Kubernetes. Prior to joining MinIO, Dil served as Chief Architect at ML pioneer Espressive. He previously worked in engineering roles at ServiceNow and Rewyndr. He began his career at Tata Consulting Services. 

Dil has Bachelor of Engineering in Computer Science and Engineering from Anna University and a Masters in Computer Science from Carnegie Mellon.

 

Dil Radhakrishnan

Engineer
Minlo

Dileeshvar Radhakrishnan is an engineer at MinIO where he focuses on AI/ML and Kubernetes. Prior to joining MinIO, Dil served as Chief Architect at ML pioneer Espressive. He previously worked in engineering roles at ServiceNow and Rewyndr. He began his career at Tata Consulting Services. 

Dil has Bachelor of Engineering in Computer Science and Engineering from Anna University and a Masters in Computer Science from Carnegie Mellon.