Addressing the Memory Wall in Die-to-Memory Chiplet Interconnect | Kisaco Research

Addressing the Memory Wall in Die-to-Memory Chiplet Interconnect

Sponsor(s): 
Eliyan
Speaker(s): 

Author:

Ramin Farjadrad

Co-Founder & CEO
Eliyan

Ramin Farjadrad is the inventor of over 130 granted and pending patents in communications and networking. He has a successful track record of creating differentiating connectivity technologies adopted by the industry as International standards (Two Ethernet standards at IEEE, one chiplet connectivity at OCP.) Ramin co-founded Velio Communications, which led to a Rambus/LSI Logic acquisition, and Aquantia, which IPO’d and was acquired by Marvell Technologies. Ramin’s Ph.D. EE is from Stanford.

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Ramin Farjadrad

Co-Founder & CEO
Eliyan

Ramin Farjadrad is the inventor of over 130 granted and pending patents in communications and networking. He has a successful track record of creating differentiating connectivity technologies adopted by the industry as International standards (Two Ethernet standards at IEEE, one chiplet connectivity at OCP.) Ramin co-founded Velio Communications, which led to a Rambus/LSI Logic acquisition, and Aquantia, which IPO’d and was acquired by Marvell Technologies. Ramin’s Ph.D. EE is from Stanford.