AI and security workloads are clearly driving next-generation SoC architecture innovations. These architectures need higher performance, and more memory per processing element as technology process nodes advance. However, memories are scaling at smaller rates than the processing elements but the workloads are demanding more memory per processing element leading to a memory wall -- there must be technology disruptions. Off-chip memory offers performance gains, but AI workloads require more efficient and higher density memories per processing element. One clear solution has been multi-die systems, leveraging more on-chip memories at higher bandwidths and improved densities. This presentation will explore these memory and IO innovations and will showcase several real-world case studies on the development of multi-die systems to meet the AI performance and memory challenges.
Ron Lowman
Ron Lowman joined Synopsys in 2014 and is currently the AI Strategic Marketing Manager for the Solutions Group. Ron is responsible for driving Synopsys’ Artificial Intelligence market IP initiatives, including strategic business and market trend analysis.
Prior to joining Synopsys, Lowman spent 16 years at Motorola/Freescale in Controls Engineering, Automotive Product & Test Engineering, Product Management, Business Development, Operations, and Strategy Roles.
Ron holds a Bachelor of Science in Electrical Engineering from Colorado School of Mines and an MBA from the University of Texas in Austin.